IBIS4-1300
Document Number: 38-05707 Rev. *B
Page 27 of 37
Offset level adjustment
The offset level of the output signal is set by a 4-bit digital word.
The offset level voltage is selected between VLOW_DAC and
VHIGH_DAC on 16 taps.
"Double slope" or "High-dynamic range" mode
IBIS4-1300 has a feature to increase the dynamic range. The
pixel response can be extended over a larger range of light
intensities by using a "dual slope integration" (patents
pending). This is obtained by the addition of charge packets
from a long and a short integration time in the pixel during the
same frame time.
Figure 24. response curve of the pixels in dual slope integration
Fig.24 shows the response curve of a pixel in dual slope
integration mode. The curve also shows the response of the
same pixel in linear integration mode, with a long and short
integration time, at the same light levels.
Dual slope integration is obtained by
• Feeding a lower supply voltage to VDD_RESETL. E.g.
apply 4 to 4.5 Volts. The difference between this voltage
and VDD determines the range of the high sensitivity, thus
the output signal level at which the transition between high
and low sensitivity occurs.
• Put the amplifier gain to the lowest value where the analog
output swing covers the ADC's digital input swing.
Increasing the amplification too much will likely boost the
high sensitivity part over the whole ADC range.
• The electronic shutter determines the ratio of integration
times of the two slopes. The high sensitivity ramp
corresponds to "no electronic shutter", thus maximal
integration time. The low sensitivity ramp corresponds to
the electronics shutter value that would have been obtained
in normal operation.
These
example
images
are
found
at
http://www.fillfactory.com/htm/technology/htm/dual-slope.htm
Figure 25. Linear long exposure time
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
0%
20%
40%
60%
80%
100%
Relative exposure (arbitrary scale)
Dual slope operation
Long integration time
Short integration time
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