IBIS4-1300
Document Number: 38-05707 Rev. *B
Page 29 of 37
Pin configuration
Pin list
Signal type symbols
A
Analog
D
Digital
W
Word bit
I/O Symbols
I
Input
O
Output
P
Power supply
G
Ground
No.
Name
Type
I/O
Description
Signal
1
Nbiasarray
A
I
1MEG to VDD and decouple to GND
Pixel source follower bias current
2
pbias2
A
I
1MEG to GND and decouple to VDD
Column amp 1st source follower (after SHY)
bias current
3
Pbias
A
I
1MEG to GND and decouple to VDD
Column amp current source bias current
4
xmux_nbias
A
I
100K to VDD and decouple to GND
X-multiplexing bias current (/6)
5
Sync_yr\
D
I
low active (0=sync)
0 = reset right shift register
6
clk_yr
D
I
Shifts on falling edge
clock right shift register
7
Eos_yr\
D
O
Active low
low 1st clk_yr pulse after last row
8
Eos_x\
D
O
Active low
low 1st clk_x pulse after last active column
9
Selextin
D
I
input selector for output amplifier
1 = external input; [0] = imager core
10
Gnd
A
G
Analog GND
11
Vdd
A
P
Analog VDD
+ 5 V DC
12
Extin
A
I
external input to output amplifier
13
Output
A
O
analog output of imager core
Connect to in_adc (p73)
14
Vlow_dac
A
I
low reference voltage offset DAC
+/- 1 V
15
Vhigh_dac
A
I
high reference voltage offset DAC
+/- 2.5 V
16
Calib_s
D
I
Slow dark offset level adjustment
0: connect to cap (st2) and in- (st1)
1: connect to rdac (st2) and output (st1)
17
gc_bit0
W
I
Lsb
gain control output amplifier
18
gc_bit1
W
I
19
gc_bit2
W
I
20
gc_bit3
W
I
Msb
21
Unitygain
D
I
sets output amplifier in unity gain
High active
22
Calib_f
D
I
fast dark offset level calibration
High active
23
Dac_b3
W
I
Msb
dac control for black offset level
24
Dac_b2
W
I
dac control for black offset level
25
Dac_b1
W
I
dac control for black offset level
26
Dac_b0
W
I
Lsb
dac control for black offset level
27
Nbias_oamp
A
I
100K to VDD and decouple to GND
output amplifier bias current
28
Sync_x\
D
I
low active (0=sync)
0 = reset X shift register
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