PIC18F6X2X datasheet(151/386 Pages) MICROCHIP

151 / 386 page

 2003 Microchip Technology Inc.

Advance Information

DS39612A-page 149

PIC18F6X2X/8X2X

15.0

TIMER4 MODULE

The Timer4 module timer has the following features:

• 8-bit timer (TMR4 register)

• 8-bit period register (PR4)

• Readable and writable (both registers)

• Software programmable prescaler (1:1, 1:4, 1:16)

• Software programmable postscaler (1:1 to 1:16)

• Interrupt on TMR4 match of PR4

Timer4 has a control register shown in Register 15-1.

Timer4 can be shut-off by clearing control bit, TMR4ON

(T4CON<2>), to minimize power consumption. The

prescaler and postscaler selection of Timer4 are also

controlled by this register. Figure 15-1 is a simplified

block diagram of the Timer4 module.

15.1

Timer4 Operation

Timer4 can be used as the PWM time base for the

PWM mode of the CCP module. The TMR4 register is

readable and writable and is cleared on any device

RESET. The input clock (FOSC/4) has a prescale option

1:1,

1:4

1:16,

selected

control

bits

T4CKPS1:T4CKPS0 (T4CON<1:0>). The match out-

put of TMR4 goes through a 4-bit postscaler (which

gives a 1:1 to 1:16 scaling inclusive) to generate a

TMR4 interrupt, latched in flag bit TMR4IF (PIR3<3>).

The prescaler and postscaler counters are cleared

when any of the following occurs:

• a write to the TMR4 register

• a write to the T4CON register

• any device RESET (Power-on Reset, MCLR

Reset, Watchdog Timer Reset, or Brown-out

Reset)

TMR4 is not cleared when T4CON is written.

T4CON: TIMER4 CONTROL REGISTER

U-0

R/W-0

—

T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1

T4CKPS0

bit 7

bit 0

bit 7

Unimplemented: Read as ‘0’

bit 6-3

T4OUTPS3:T4OUTPS0: Timer4 Output Postscale Select bits

0000

= 1:1 postscale

0001

= 1:2 postscale

•

1111

= 1:16 postscale

bit 2

TMR4ON: Timer4 On bit

= Timer4 is on

= Timer4 is off

bit 1-0

T4CKPS1:T4CKPS0: Timer4 Clock Prescale Select bits

= Prescaler is 1

= Prescaler is 4

= Prescaler is 16

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

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