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TMP91CW60DFG Datasheet(PDF) 51 Page - Toshiba Semiconductor |
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TMP91CW60DFG Datasheet(HTML) 51 Page - Toshiba Semiconductor |
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51 / 262 page  Page 48 2007-12-03 TMP91CW60 Table 4-2 I/O Port Setting List(1/4) Ports Pin Names Specifications I/O Register Setting Values Pn PnCR PnFC PnFC2 ODE Port0 P00 to P07 Input port × 0 None None None Output port × 1 AD0 to AD7 bus#1 ×× Port1 P10 to P17 Input port × 00 None None Output port × 10 AD8 to AD15 bus × 01 A8 to A15 output × 11 Port2 P20 to P27 Input port × 00 None None Output port × 10 A0 to A7 output × 01 A16 to A23 output × 11 Port3 P30 to P31 Input port × 000 − Output port (CMOS output) × 100 0 Output port (open drain output) × 100 1 P32 to P33 Input port × 00 None None Output port × 10 P30 TB3IN0 Input, INT3 Input × 010 − SDA0 input/output (CMOS output) × 101 0 SDA0 input/output (open drain output)#2 × 101 1 P31 TB3IN1 Input, INT4 Input × 010 − SCL0 input/output (CMOS output) × 101 0 SCL0 input/output (open drain output)#2 × 101 1 P32 WAIT output × 01 None None TB3OUT0 output × 11 P33 TB3OUT1 output × 11 |
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