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TMP91CW60DFG Datasheet(PDF) 28 Page - Toshiba Semiconductor

Part # TMP91CW60DFG
Description  16 Bit Microcontroller
PDF  262 Pages
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Manufacturer  TOSHIBA [Toshiba Semiconductor]
Direct Link  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TMP91CW60DFG Datasheet(HTML) 28 Page - Toshiba Semiconductor

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Page 25
2007-12-03
TMP91CW60
3. STOP mode
When STOP mode is selected, all internal circuits stop, including the internal oscillator. Pin status in
STOP mode depends on the settings in the SYSCR2<DRVE> register. Table 2-9 summarizes the state of
these pins in STOP mode.
After STOP mode has been cleared, system clock output starts when the warm-up time has elapsed, in
order to allow oscillation to stabilize. After STOP mode has been cleared, either NORMAL mode or
SLOW mode can be selected using the SYSCR0<RSYSCK> register. Therefore, <RSYSCK>, <RXEN>
and <RXTEN> must be set. See the sample warm-up times in Table 2-8.
Figure 2-9 illustrates the timing for clearance of the STOP mode halt state by an interrupt.
Figure 2-9 Timing Chart for STOP Mode Halt State Cleared by Interrupt
Note: fOSCH=20MHz, fs=32.768kHz
Table 2-8
Sample Warm-up Times after Clearance of STOP Mode
SYSCR0
<RSYSCK>
SYSCR2<WUPTM1:0>
01(28)10(214)11(216)
00(218)
0(fc)
12.8us
0.819ms
3.277ms
13.107ms
1(fs)
7.8ms
500ms
2000ms
8000ms
STOP
X1
A0∼A23
RD
WR
AD0∼AD15
ALE
Address
Address
Data
Data



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