PCM1738ESLASH2K datasheet(24/47 Pages) TI2

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PCM1738

SBAS174C – FEBRUARY 2002 – REVISED FEBRUARY 2007

B15

B14

B13

B12

B11

B10

W/R

ATLD

FMT2

FMT1

FMT0

DMF1

DMF0

DME

MUTE

W/R

Read/Write Mode Control

When W/R = 0, a write operation is performed.

When W/R = 1, a read operation is performed.

Default value: 0

ATLD

Attenuation Load Control

This bit is read/write.

Default value: 0

ATLD = 0

Attenuation control disabled (default)

ATLD = 1

Attenuation control enabled

The ATLD bit is used to enable loading of attenuation data set by registers 16 through 17. When

ATLD = 0, the attenuation settings remain at the previously programmed level, ignoring new data

loaded to registers 16 through 17. When ATLD = 1, attenuation data written to registers 16 through

17 is loaded normally.

FMT[2:0] Audio Interface Data Format

These bits are read/write.

Default value: 000

FMT[2:0]

Audio Data Format Selection

000

16-bit, standard-format, right-justified data (default)

001

20-bit, standard-format, right-justified data

010

24-bit, standard-format, right-justified data

011

24-bit, MSB-first, left-justified format data

100

16-bit, I2S-format data

101

24-bit, I2S-format data

110

Reserved

111

Reserved

The FMT[2:0] bits are used to select the data format for the serial audio interface.

For external digital-filter interface mode (DFTH mode), this register is operated as shown in the

Application for External Digital Filter Interface section of this data sheet.

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