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PCM1738E/2K Datasheet(PDF) 37 Page - Texas Instruments |
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PCM1738E/2K Datasheet(HTML) 37 Page - Texas Instruments |
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37 / 47 page ![]() www.ti.com t=1/(64 44.1kHz) ´ DATAL DATAR BCK D0 D1 D2 D3 D4 T0229-01 t w(BCH) t w(BCL) t (BCY) BCK DATAL DATAR t (DS) 1.4V 1.4V T0010-11 t (DH) PCM1738 SBAS174C – FEBRUARY 2002 – REVISED FEBRUARY 2007 Figure 45. Normal Data Output Form From DSD Decoder PARAMETER MIN MAX UNIT t(BCY) BCK clock cycle time 85(1) ns tw(BCH) BCK high-level time 30 ns tw(BCL) BCK low-level time 30 ns t(DS) DATAL, DATAR setup time 10 ns t(DH) DATAL, DATAR hold time 10 ns (1) 2.8224 MHz × 4. (2.8224 MHz = 64 × 44.1 kHz. This value is specified at the DSD sampling rate.) Figure 46. Timing for DSD Audio Interface 37 Submit Documentation Feedback |
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