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LM3555TLX/NOPB Datasheet(PDF) 18 Page - Texas Instruments

Part # LM3555TLX/NOPB
Description  LM3555 Synchronous Boost Converter With 500-mA High-Side LED Driver and Dual-Mode Control Interface
PDF  37 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

LM3555TLX/NOPB Datasheet(HTML) 18 Page - Texas Instruments

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LM3555
SNVS594G – DECEMBER 2008 – REVISED APRIL 2016
www.ti.com
Product Folder Links: LM3555
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Copyright © 2008–2016, Texas Instruments Incorporated
Feature Description (continued)
7.3.9 Fault Protections
The LM3555 has a number of fault protection mechanisms designed to not only protect the LM3555 device itself,
but also the rest of the system. Active faults protections include:
•
Overvoltage protection (VOUT)
•
Short-Circuit protection (VOUT and VLED)
•
Overtemperature protection
•
Flash timeout
•
Indicator LED protection (open and short)
•
Broken inductor protection
In the event that any of these faults occur, the LM3555 sets a flag in the Fault Register (Address 0x05) and
places the device into standby or shutdown. In simple control mode, normal operation cannot resume until the
fault has been fixed and until EN1 and EN2 are driven low 0. In I2C control mode, normal operation cannot
resume until the fault has be fixed and until an I2C read of the faults register (0x05) has completed. The act of
reading the fault register clears the fault bits.
7.3.9.1 Output Overvoltage Protection (OVP)
An OVP fault is triggered when the output voltage of the LM3555 reaches a value greater than 9.5 V (typical).
The OVP condition is cleared when the output voltage (VOUT) is able to operate below 9.5 V. An output capacitor
or an LED that has become an open circuit can cause an OVP event to occur. This fault is reported to the OVP
fault bit in the Fault Register (bit7 in address 0x05).
7.3.9.2 Output and LED Short-Circuit Protection (SCP)
An SCP fault is triggered when the output voltage (VOUT) and/or the VLED pin does not reach 0.8 V in 0.5 ms.
The short circuit condition is cleared when the output (VOUT) is allowed to reach its steady state target and
when the LED voltage rises above 0.8 V. A shorted output capacitor or a shorted LED could cause this fault to
occur. This fault is reported to the SC fault bit in the Fault Register (bit6 in address 0x05).
7.3.9.3 Overtemperature Protection (OTP)
An OTP fault is triggered when the diode junction temperature of the LM3555 reaches an internal temperature of
around 150°C. The OTP condition is cleared when the junction temperature falls below 140°C. A printed circuit
board (PCB) with poor thermal dissipation properties and very high ambient temperatures (greater that 85°C)
could cause this fault to occur. Refer to AN-1112 DSBGA Wafer Level Chip Scale Package (SNVA009) for more
information regarding proper PCB layout. This fault is reported to the OTP fault bit in the Fault Register (bit5 in
address 0x05).
7.3.9.4 Flash Timeout (FTP)
An FTP fault is triggered any time the flash pulse duration reaches the flash timeout duration. In I2C control
mode, the FTP fault is triggered whenever a flash is initiated through the Control Register (OEN and OM1/OM0
bits) or through an edge-sensitive strobe event. A FTP fault could occur in simple control Mode if the controller
tied to EN1 and EN2 pins cannot toggle the pins low at the desired pulse rate. This same condition could occur
with a level-sensitive strobe event controlled by a camera module. This fault is reported to the TO fault bit in the
Fault Register (bit4 in address 0x05). A FTP fault is the only reported fault that does not need to be cleared
before any additional LED event can occur.
7.3.9.5 Indicator Fault (IF)
An IF fault is triggered when the voltage on the IND pin is greater than 2.571 V or less than 0.842 V. This fault
indicates that there is either an open or a short present on the IND pin. The short-circuit condition is cleared
when the IND pin is allowed to operate between 0.842 V and 2.571 V. A shorted or open indicator LED could
cause this fault to occur. This fault is reported to the IF fault bit in the Fault Register (bit2 in address 0x05).



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