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STW4810 Datasheet(PDF) 53 Page - STMicroelectronics |
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STW4810 Datasheet(HTML) 53 Page - STMicroelectronics |
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53 / 78 page  STw4810 Electrical and timing characteristics 53/78 VIO_VMEM regulator in sleep mode (SLEEP=’1’) VBAT Input power supply Battery voltage 2.7 3.6 4.8 V VRIPPLE Output ripple 10 mVpp LIR Line regulation VBAT: [2.7; 4.8]V 10 mV LDR Load regulation IOUT: [0.1; 5] mA 10 mV IOUT Output current 5 mA PEFF Power efficiency VBAT = 3.6 V IOUT = [0.1; 5] mA 85 % IQ Quiescent current IOUT = 0 mA 15 µA LIRT Transient line regulation ΔVBAT = 300 mV tR = tF = 10 µs 7 mV 1. Including output voltage temperature coefficient, DC line and load regulations, voltage reference accuracy, industrial manufacturing tolerances and ripple voltage due to switching 2. Guaranteed by design Table 39. VIO_VMEM DC/DC step-down converter (continued) Symbol Description Test conditions Min. Typ. Max. Units |
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