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STW4810 Datasheet(PDF) 16 Page - STMicroelectronics |
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STW4810 Datasheet(HTML) 16 Page - STMicroelectronics |
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16 / 78 page  Functional description STw4810 16/78 Figure 3. Start-up timing All regulators are started with PDN_regulators but can be switched off from the beginning or during application by software ( Table 27) PON ball PDN__OSC PDN_regulators VDDOK ball CLK32K_IN ball PORn ball PWREN ball OFF START_PM Reset 1ms INT_OSC TCXO_EN ball Internal_OSC 11*(1/32kHz) OFF2 MASTER_CLK ball REQUEST_MC ball VBAT 300µs 9.38ms (11ms wc) Reset START_BIAS 7.77ms (9.46ms wc) “or” Delays are worst case maximum delays Voutput(s) ball VPLL / VIO_VMEM VCORE CLK32K ball (*) (*) If 32 kHz available before VDDOK signal rising edge, OFF2 state duration is null PWREN unmasked |
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