LM46002PWPRG4 datasheet(29/54 Pages) TI2

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FBT

FBB

2 f

/ /R

)

OUT

4.35

OUT

ESR

(

0.5)

u u '

OUT

(1 D )

(1 r)

/ I

)

LM46002

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SNVSA13C – APRIL 2014 – REVISED APRIL 2019

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For a given input and output requirement, the following inequality gives an approximation for an absolute

minimum output cap required:

(19)

Along with this for the same requirement, the max ESR should be calculated as per the following inequality

where

•

r = Ripple ratio of the inductor ripple current (ΔIL / IOUT)

•

ΔVOUT = target output voltage undershoot

•

D’ = 1 – duty cycle

•

FS = switching frequency

•

IOUT = load current

(20)

A general guide line for COUT range is that COUT should be larger than the minimum required output capacitance

calculated by Equation 19, and smaller than 10 times the minimum required output capacitance or 1 mF. In

applications with VOUT less than 3.3 V, it is critical that low ESR output capacitors are selected. This will limit

potential output voltage overshoots as the input voltage falls below the device normal operating range. To

optimize the transient behavior a feed-forward capacitor could be added in parallel with the upper feedback

resistor. For this design example, three 47-µF,10-V, X7R ceramic capacitors are used in parallel.

8.2.2.7 Feed-Forward Capacitor

The LM46002 is internally compensated and the internal R-C values are 400 kΩ and 50 pF, respectively.

Depending on the VOUT and frequency FS, if the output capacitor COUT is dominated by low ESR (ceramic types)

capacitors, it could result in low phase margin. To improve the phase boost an external feedforward capacitor

CFF can be added in parallel with RFBT. CFF is chosen such that phase margin is boosted at the crossover

frequency without CFF. A simple estimation for the crossover frequency without CFF (fx) is shown in Equation 21,

assuming COUT has very small ESR.

(21)

Equation 22 was tested for CFF was tested:

(22)

Equation 22 indicates that the crossover frequency is geometrically centered on the zero and pole frequencies

caused by the CFF capacitor.

For designs with higher ESR, CFF is not necessary when COUT has very high ESR and CFF calculated from

Equation 22 should be reduced with medium ESR. Table 2 can be used as a quick starting point.

For the application in this design example, a 47-pF COG capacitor is selected.

8.2.2.8 Bootstrap Capacitors

Every LM46002 design requires a bootstrap capacitor, CBOOT. The recommended bootstrap capacitor is 0.47 μF

and rated at 6.3 V or higher. The bootstrap capacitor is located between the SW pin and the CBOOT pin. The

bootstrap capacitor must be a high-quality ceramic type with X7R or X5R grade dielectric for temperature

stability.

LM46002PWPRG4 Datasheet(PDF) 29 Page - Texas Instruments

LM46002PWPRG4 Datasheet(HTML) 29 Page - Texas Instruments

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