L99PM62GXP datasheet(63/102 Pages) STMICROELECTRONICS

63 / 102 page

L99PM62GXP

Electrical specifications

Doc ID 17639 Rev 4

63/102

DI timing

The voltages are referred to ground and currents are assumed positive, when the current

flows into the pin. 6 V < VS < 18 V; 4.5 V < V1 < 5.3 V; all outputs open; Tj = -40 °C to

130 °C, unless otherwise specified.

The voltages are referred to ground and currents are assumed positive, when the current

flows into the pin. 6 V < VS < 18 V; 4.5 V < V1 < 5.3 V; all outputs open; Tj = -40 °C to

130 °C, unless otherwise specified.

Cin

(1)

input capacitance at

input CSN, CLK, DI and

PWM1,2

0V < V1 < 5.3 V

fCLK

SPI input frequency at

CLK

1MHz

Value of input capacity is not measured in production test. Parameter guaranteed by design.

Table 38.

DI timing(1)

See Figure 32.

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

tCLK

Clock period

V1 = 5 V

1000

tCLKH

Clock high time

V1 = 5 V

400

tCLKL

Clock low time

V1 = 5 V

400

tset CSN

CSN setup time, CSN low

before rising edge of CLK

V1 = 5 V

400

tset CLK

CLK setup time, CLK high

before rising edge of CSN

V1 = 5 V

400

tset DI

DI setup time

V1 = 5 V

200

thold DI

DI hold time

V1 = 5 V

200

tr in

Rise time of input signal

DI, CLK, CSN

V1 = 5 V

100

tf in

Fall time of input signal

DI, CLK, CSN

V1 = 5 V

100

Table 39.

DO output pin

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

VDOL

Output low level

V1 = 5 V, ID = -4 mA

0.5

VDOH

output high level

V = 5 V, ID = 4 mA

4.5

Table 37.

Input CLK, DI (continued)

Symbol

Parameter

Test condition

Min.

Typ.

Max.

Unit

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