L99PM62GXP datasheet(18/102 Pages) STMICROELECTRONICS

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Detailed description

L99PM62GXP

18/102

Doc ID 17639 Rev 4

Interrupt

The interrupt signal (linked to RxDL/NINT internally) indicates a wake-up event from V1

standby mode. In case of a wake-up by Wake-up Inputs, activity on LIN or CAN, SPI access

or timer-interrupt the NINT pin is pulled low for 56 µs.

In case of V1 standby mode and (IV1 > Icmp), the device remains in standby mode, the V1

regulator switches to high current mode and the watchdog starts. No Interrupt signal is

generated.

2.2.4

VBAT standby mode

The transition from active mode to VBAT standby mode is initiated by an SPI command.

In VBAT standby mode, the V1 voltage regulator, relay outputs, LIN and CAN transmitters are

switched off. High-side outputs and the V2 regulator remain in the configuration

programmed prior to the standby command.

In VBAT standby mode the current consumption of the L99PM62GXP is reduced to a

minimum level.

Note:

Inputs TXDL, TXDC and CSN must be terminated to GND in VBAT standby to achieve

minimum standby current.

This can be achieved with the internal ESD protection diodes of the microcontroller

(microcontroller is not supplied in this mode; V1 is pulled to GND).

2.2.5

Wake up from standby modes

A wake-up from standby mode switches the device to active mode. This can be initiated by

one or more of the following events:

To prevent the system from a deadlock condition (no wake up possible) a configuration

where the periodic timer interrupt and wake up by LIN and HS CAN are disabled, is not

Table 3.

Wake up sources

Wake up source

Description

LIN bus activity

Can be disabled by SPI

CAN bus activity

Can be disabled by SPI

Level change of WU1 - 3

Can be individually configured or disabled by SPI

IV1 > Icmp

Device remains in V1 standby mode but watchdog is enabled (If

Icmp = 0) and the V1 regulator goes into high current mode (increased

current consumption). No interrupt is generated.

Timer interrupt / wake up

of µC by TIMER

Programmable by SPI

–V1 standby mode: device wakes up and Interrupt signal is generated

at RxDL/NINT when programmable time-out has elapsed

–VBAT standby mode: device wakes up, V1 regulator is turned on and

NReset signal is generated when programmable time-out has elapsed

SPI access

Always active (except in VBAT standby mode)

Wake up event: CSN is low and first rising edge on CLK

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