DA9073 datasheet(21/134 Pages) RENESAS

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DA9073

Ultra-Low Quiescent Current PMIC

Datasheet

Revision 3.5

16-Jun-2023

21 of 134

Table 10: LDO2/Loadswitch

Parameter

Description

Conditions

Min

Typ

Max

Unit

Electrical Performance

VIN_LDSW_2

Input voltage range for Load

Switch

Load Switch mode, VVDD_LDO

> VVLDO

0.8

5.5

VIN_LDO_2

Input voltage range for LDO

LDO mode, VVDD_LDO > VVLDO

1.8

5.5

VOUT_ACC_LO

DC output accuracy

VVDD_LDO > VVLDO + 0.2V

-3

VOUT_LDO_2

Output range for LDO

Programmable range, 50mV

or 75mV steps

0.8

3.3

VOUT_LINE_2

DC line regulation

1.8V < VVDD_LDO < 5.5V

IOUT=500uA

-0.8

0.8

VOUT_LD_2

DC load regulation

2uA < IOUT < 100 mA,

VVDD_LDO > VVOUT_LDO + 0.2V,

VVLDO=3.0V

-3

VOUT_TR_LD_2

Load transient

2uA to 100 mA, 100mA/usec,

VVDD_LDO > VVLDO +

0.2V, VVLDO=3.0V

-120

RON_LDSW_ILI

M_2

On resistance of LDSW

mode with current limit

VVDD_LDO = 3.7V

1.5

RON_LDSW_N

O_ILIM_2

On resistance of LDSW

mode without current limit

VVDD_LDO = 3.7V

0.27

RDCHG_LDO_O

N_2

MOSFET on-resistance for

LDO discharge

ILOAD = -10 mA

ILIM_OUT_LDO_

Output current limit (LDO

MODE)

VLDO = 0.9 x VLDO(nom)

155

IOUT_LDO_HI1_

Output current

VVDD_LDO > VVLDO + 0.2V

150

IIN_LDO_ON_2

Quiescent current

LDO mode

0.8

μA

IIN_LDO_OFF_2

OFF-state supply current

0.001

μA

PSRR_vddldo

Power supply rejection ratio

@10KHz, IOUT=75mA

tSTART_LDO2

LDO start-up delay time

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