AT45DB641E datasheet(20/78 Pages) RENESAS

20 / 78 page

DS-AT45DB641E-027 Rev. O

Page 20

6/30/23

AT45DB641E Datasheet

7.7

Page Erase

The Page Erase command can be used to individually erase any page in the main memory array allowing the

Buffer to Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program

through Buffer 1 command to be used at a later time.

To perform a Page Erase with the standard DataFlash page size (264 bytes), an opcode of 81h must be clocked

into the device followed by three address bytes comprised of 15 page address bits (PA14 - PA0) that specify the

page in the main memory to be erased, and 9 dummy bits.

To perform a Page Erase with the binary page size (256 bytes), an opcode of 81h must be clocked into the device

followed by three address bytes comprised of 1 dummy bit, 15 page address bits (A22 - A8) that specify the page

in the main memory to be erased, and 8 dummy bits.

When a low-to-high transition occurs on the CS pin, the device erases the selected page (the erased state is a

Logic 1). The erase operation is internally self-timed and takes place in a maximum time of tPE. During this time,

the RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase

properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.

AT45DB641E Datasheet(PDF) 20 Page - Renesas Technology Corp