M7020R datasheet(22/150 Pages) STMICROELECTRONICS

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M7020R

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Comparand Registers

The device contains 32 68-bit comparand regis-

ters (16 pairs) dynamically selected in every

SEARCH operation to store the comparand pre-

sented on the DQ Bus. The LEARN command will

later use these registers when executed. The

M7020R stores the SEARCH command’s Cycle A

comparand in the even-numbered register and the

Cycle B comparand in the odd-numbered register,

as shown in Figure 10.

Mask Registers

The device contains 16 68-bit global mask regis-

ters (8 pairs) dynamically selected in every

SEARCH operation to select the search subfield.

The addressing of these registers is explained in

Figure 11. The three-bit GMR Index supplied on

the CMD bus can apply 8 pairs of global masks

during the SEARCH and WRITE operations, as

shown in Figure 11.

Note: In 68-bit SEARCH and WRITE operations,

the host ASIC must program both the even and

odd mask registers with the same values.

Each mask bit in the GMRs is used during

SEARCH and WRITE operations. In SEARCH op-

erations, setting the mask bit to '1' enables com-

pares; setting the mask bit to '0' disables

compares (forced match) at the corresponding bit

position. In WRITE operations to the data or mask

array, setting the mask bit to '1' enables WRITEs;

setting the mask bit to '0' disables WRITEs at the

corresponding bit position.

Figure 10. Comparand Register Selection

During SEARCH and LEARN

Instructions

Figure 11. Addressing the Global Masks

135

Address

Index

AI04275

135

Address

Index

AI04276

SEARCH and WRITE Command

Global Mask Selection

M7020R Datasheet(PDF) 22 Page - STMicroelectronics

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