R5F5651EDDFM datasheet(164/188 Pages) RENESAS

164 / 188 page

R01DS0276EJ0240 Rev.2.40

Page 164 of 188

Oct 31, 2023

RX65N Group, RX651 Group

2. Electrical Characteristics

Note:

The above specification values apply when there is no access to the external bus during A/D conversion. If access proceeds

during A/D conversion, values may not fall within the above ranges.

Note 1. The conversion time includes the sampling time and the comparison time. As the test conditions, the number of sampling states

is indicated.

Note 2. The value in parentheses indicates the sampling time.

Table 2.50

12-Bit A/D (Unit 1) Conversion Characteristics

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,

PCLKB = PCLKD = 1 MHz to 60 MHz, Ta = Topr,

Source impedance = 1.0 kΩ

Item

Min.

Typ.

Max.

Unit

Test Conditions

Resolution

—

Bit

Conversion time*1

(Operation at PCLKD = 60 MHz)

0.88

(0.633)*2

—

µs

Sampling in 38 states

(ADSAM.SAM = 1)

Conversion time*1

(Operation at PCLKD = 30 MHz)

(0.500)*2

—

µs

Sampling in 15 states

(ADSAM.SAM = 1)

Analog input capacitance

—

Offset error

—

±2.0

±3.5

LSB

Full-scale error

—

±2.0

±3.5

LSB

Quantization error

—

±0.5

—

LSB

Absolute accuracy

—

±4.0

±6.0

LSB

DNL differential nonlinearity error

(Operation at PCLKD = 60 MHz)

—

±1.5

±4.0

LSB

DNL differential nonlinearity error

(Operation at PCLKD = 30 MHz)

—

±1.5

±2.5

LSB

INL integral nonlinearity error

(Operation at PCLKD = 60 MHz)

—

±2.0

±4.0

LSB

INL integral nonlinearity error

(Operation at PCLKD = 30 MHz)

—

±2.0

±3.5

LSB

Table 2.51

A/D Internal Reference Voltage Characteristics

Conditions: VCC = AVCC0 = AVCC1 = VCC_USB = VBATT = 2.7 to 3.6 V, 2.7 V ≤ VREFH0 ≤ AVCC0,

VSS = AVSS0 = AVSS1 = VREFL0 = VSS_USB = 0 V,

PCLKB = PCLKD = 60 MHz, Ta = Topr

Item

Min.

Typ.

Max.

Unit

Test

Conditions

A/D internal reference voltage

1.13

1.18

1.23

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