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NRF52810-QFAA-R Datasheet(PDF) 261 Page - Nordic Semiconductor |
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NRF52810-QFAA-R Datasheet(HTML) 261 Page - Nordic Semiconductor |
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261 / 483 page  Peripherals The decoder can also be configured to asynchronously load a new PWM duty cycle. If the DECODER.MODE register is set to NextStep - then the NEXTSTEP task will cause an update of the internal compare registers on the next PWM period. The figures below provide an overview of each part of an arbitrary sequence, in various modes (LOOP.CNT=0 and LOOP.CNT>0). In particular are represented: • Initial and final duty cycle on the PWM output(s) • Chaining of SEQ[0] and SEQ[1] if LOOP.CNT>0 • Influence of registers on the sequence • Events fired during a sequence • DMA activity (loading of next value and applying it to the output(s)) Note that the single-shot example applies also to SEQ[1], only SEQ[0] is represented for simplicity. 100% duty cycle New value load Previously loaded duty cycle 0% duty cycle last loaded duty cycle maintained Figure 53: Single shot (LOOP.CNT=0) 4430_161 v1.0 261 |
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