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NRF52810-QFAA-R Datasheet(PDF) 259 Page - Nordic Semiconductor

Part # NRF52810-QFAA-R
Description  RF52810
PDF  483 Pages
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Manufacturer  NORDIC [Nordic Semiconductor]
Direct Link  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF52810-QFAA-R Datasheet(HTML) 259 Page - Nordic Semiconductor

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Peripherals
Simple sequence example on page 259 depicts the source code used for configuration and timing
details in a sequence where only sequence 0 is used and only run once with a new PWM duty cycle for
each period.
NRF_PWM0->PSEL.OUT[0] = (first_pin << PWM_PSEL_OUT_PIN_Pos) |
(PWM_PSEL_OUT_CONNECT_Connected <<
PWM_PSEL_OUT_CONNECT_Pos);
NRF_PWM0->ENABLE
= (PWM_ENABLE_ENABLE_Enabled << PWM_ENABLE_ENABLE_Pos);
NRF_PWM0->MODE
= (PWM_MODE_UPDOWN_Up << PWM_MODE_UPDOWN_Pos);
NRF_PWM0->PRESCALER
= (PWM_PRESCALER_PRESCALER_DIV_1 <<
PWM_PRESCALER_PRESCALER_Pos);
NRF_PWM0->COUNTERTOP = (16000 << PWM_COUNTERTOP_COUNTERTOP_Pos); //1 msec
NRF_PWM0->LOOP
= (PWM_LOOP_CNT_Disabled << PWM_LOOP_CNT_Pos);
NRF_PWM0->DECODER
= (PWM_DECODER_LOAD_Common << PWM_DECODER_LOAD_Pos) |
(PWM_DECODER_MODE_RefreshCount << PWM_DECODER_MODE_Pos);
NRF_PWM0->SEQ[0].PTR = ((uint32_t)(seq0_ram) << PWM_SEQ_PTR_PTR_Pos);
NRF_PWM0->SEQ[0].CNT = ((sizeof(seq0_ram) / sizeof(uint16_t)) <<
PWM_SEQ_CNT_CNT_Pos);
NRF_PWM0->SEQ[0].REFRESH = 0;
NRF_PWM0->SEQ[0].ENDDELAY = 0;
NRF_PWM0->TASKS_SEQSTART[0] = 1;
P
O
L
COMPARE
0
SEQ[0].PTR
P
O
L
COMPARE
1
SEQ[0].CNT=4, SEQ[0].REFRESH=0, SEQ[0].ENDDELAY=0, LOOP.CNT=0
PWM Pulse Period
P
O
L
COMPARE
2
P
O
L
COMPARE
3
SEQEND[0]
SEQSTARTED[0]
SEQSTART[0]
Event/Tasks
Continues With Last Setting
Figure 51: Simple sequence example
A more complex example is shown in Example using two sequences on page 260, where LOOP.CNT>0 .
In this case, an automated playback takes place, consisting of SEQ[0], delay 0, SEQ[1], delay 1, then again
SEQ[0], etc. The user can choose to start a complex playback with SEQ[0] or SEQ[1] through sending the
SEQSTART[0] or SEQSTART[1] task.
The complex playback always ends with delay 1.
The two sequences 0 and 1 are defined with address of values tables in Data RAM (pointed by SEQ[n].PTR)
and respective buffer size (SEQ[n].CNT). The rate at which a new value is loaded is defined individually
for each sequence by SEQ[n].REFRESH . The chaining of sequence 1 following sequence 0 is implicit, the
LOOP.CNT register allows the chaining of sequence 1 to sequence 0 for a determined number of times. In
other words, it allows to repeat a complex sequence a number of times in a fully automated way.
In the example below, sequence 0 is defined with SEQ[0].REFRESH set to one - that means that a new
PWM duty cycle is pushed every second PWM period. This complex sequence is started with the
SEQSTART[0] task, so SEQ[0] is played first. Since SEQ[0].ENDDELAY=1 there will be one PWM period delay
4430_161 v1.0
259



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