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NRF52810-QFAA-R Datasheet(PDF) 257 Page - Nordic Semiconductor |
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NRF52810-QFAA-R Datasheet(HTML) 257 Page - Nordic Semiconductor |
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257 / 483 page  Peripherals P O L COMPARE P O L COMPARE ... P O L COMPARE COMP0 COMP1 COMP2 COMP3 SEQ[n].PTR COMP0 COMP1 COMP2 COMP3 COMP0 COMP1 COMP2 COMP3 DECODER.LOAD=Common P O L COMPARE P O L COMPARE ... P O L COMPARE COMP0 COMP1 COMP2 COMP3 COMP0 COMP1 DECODER.LOAD=Grouped P O L COMPARE P O L COMPARE P O L COMPARE COMP0 COMP1 COMP3 DECODER.LOAD=Single P O L COMPARE COMP2 Increasing Data RAM Address P O L COMPARE P O L COMPARE TOP COMP0 COMP1 COUNTERTOP DECODER.LOAD=WaveForm P O L COMPARE COMP2 Figure 50: Decoder memory access modes SEQ[n].PTR is the pointer used to fetch COMPARE values from RAM. If the SEQ[n].PTR is not pointing to the Data RAM region, an EasyDMA transfer may result in a HardFault or RAM corruption. See Memory on page 15 for more information about the different memory regions. After the SEQ[n].PTR is set to the desired RAM location, the SEQ[n].CNT register must be set to the number of 16-bit half words in the sequence. It is important to observe that the Grouped and Single modes require one half word per group or one half word per channel respectively, and thus increases RAM size occupation. If PWM generation was not running yet at that point, sending the SEQSTART[n] task will load the first value from RAM, then start the PWM generation. A SEQSTARTED[n] event is generated as soon as the EasyDMA has read the first PWM parameter from RAM and the wave counter has started executing it. When LOOP.CNT=0, sequence n=0 or 1 is played back once. After the last value in the sequence has been loaded and started executing, a SEQEND[n] event is generated. The PWM generation will then continue with the last loaded value. See Simple sequence example on page 259 for an example of such simple playback. To completely stop the PWM generation and force the associated pins to a defined state, a STOP task can be fired at any time. A STOPPED event is generated when the PWM generation has stopped at the end of currently running PWM period, and the pins go into their idle state as defined in GPIO->OUT. PWM generation can then only be restarted through a SEQSTART[n] task. SEQSTART[n] will resume PWM generation after having loaded the first value from the RAM buffer defined in the SEQ[n].PTR register. The table below provides indication of when specific registers get sampled by the hardware. Care should be taken when updating these registers to avoid values to be applied earlier than expected. 4430_161 v1.0 257 |
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