NRF52820-QDAA-R7 datasheet(56/437 Pages) NORDIC

56 / 437 page

Power and clock management

• CLOCK — Clock control on page 69

• POWER — Power supply on page 49

• NVMC — Non-volatile memory controller on page 19

• CPU on page 14

• Flash memory

• RAM

See Debug on page 40 for more information.

Because the CPU is kept on in an emulated System OFF mode, it is recommended to add an infinite loop

directly after entering System OFF, to prevent the CPU from executing code that normally should not be

executed.

5.3.4 System ON mode

System ON is the default state after power-on reset. In System ON mode, all functional blocks such as the

CPU or peripherals can be in IDLE or RUN mode, depending on the configuration set by the software and

the state of the application executing.

The system can switch the appropriate internal power sources on and off, depending on the amount of

power needed at any given time. The power requirement of a peripheral is directly related to its activity

level, and the activity level of a peripheral fluctuates when specific tasks are triggered or events are

generated.

5.3.4.1 Sub-power modes

In System ON mode, when the CPU and all peripherals are in IDLE mode, the system can reside in one of

the two sub-power modes.

The sub-power modes are:

• Constant Latency

• Low-power

In Constant Latency mode, the CPU wakeup latency and the PPI task response are constant and kept at

a minimum. This is secured by forcing a set of basic resources to be turned on while in sleep. The cost of

constant and predictable latency is increased power consumption. Constant Latency mode is selected by

triggering the CONSTLAT task.

In Low-power mode, the automatic power management system described in System ON mode on page

56 ensures that the most efficient supply option is chosen to save power. The cost of having the lowest

possible power consumption is a varying CPU wakeup latency and PPI task response. Low-power mode is

selected by triggering the LOWPWR task.

When the system enters System ON mode, it is by default in the sub-power mode Low-power.

5.3.5 RAM power control

The RAM power control registers are used for configuring the following:

• The RAM sections to be retained during System OFF

• The RAM sections to be retained and accessible during System ON

In System OFF, retention of a RAM section is configured in the RETENTION field of the corresponding

In System ON, retention and accessibility of a RAM section is configured in the RETENTION and POWER

fields of the corresponding register RAM[n].POWER (n=0..3) on page 66.

The following table summarizes the behavior of these registers.

4463_156 v1.0

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