NRF52820-QDAA-R7 datasheet(20/437 Pages) NORDIC

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Core components

4.3.4 Erasing user information configuration registers (UICR)

When erase is enabled, UICR can be erased using the ERASEUICR on page 23.

After erasing UICR, all bits in UICR are set to

1. The time it takes to erase UICR is specified by tERASEPAGE.

The CPU is halted if the CPU executes code from the flash while the NVMC performs the erase operation.

4.3.5 Erase all

When erase is enabled, flash and UICR can be erased completely in one operation by using the ERASEALL

on page 22. This operation will not erase the factory information configuration registers (FICR).

The time it takes to perform an ERASEALL command is specified by tERASEALL. The CPU is halted if the CPU

executes code from the flash while the NVMC performs the erase operation.

4.3.6 Access port protection behavior

When access port protection is enabled, parts of the NVMC functionality will be blocked in order to

prevent intentional or unintentional erase of UICR.

CTRL-AP ERASEALL NVMC ERASEPAGE NVMC ERASEPAGE

PARTIAL

NVMC ERASEALL NVMC ERASEUICR

APPROTECT

Disabled

Allowed

Enabled

Allowed

Blocked

Table 5: NVMC Protection

4.3.7 NVMC power failure protection

NVMC power failure protection is possible through use of power-fail comparator that is monitoring power

supply.

If the power-fail comparator is enabled, and the power supply voltage is below VPOF threshold, the power-

fail comparator will prevent the NVMC from performing erase or write operations in non-volatile memory

(NVM).

If a power failure warning is present at the start of an NVM erase operation, the NVMC operation will be

ignored.

If a power failure warning is present at the start of an NVM write operation, the CPU will hardfault.

4.3.8 Partial erase of a page in flash

Partial erase is a feature in the NVMC to split a page erase time into shorter chunks to prevent longer CPU

stalls in time-critical applications. Partial erase is only applicable to the code area in flash memory and

does not work with UICR.

When erase is enabled, the partial erase of a flash page can be started by writing to ERASEPAGEPARTIAL

on page 23. The duration of a partial erase can be configured in ERASEPAGEPARTIALCFG on page

24. A flash page is erased when its erase time reaches tERASEPAGE. Use ERASEPAGEPARTIAL N number

of times so that N * ERASEPAGEPARTIALCFG ≥ tERASEPAGE, where N * ERASEPAGEPARTIALCFG gives the

cumulative (total) erase time. Every time the cumulative erase time reaches tERASEPAGE, it counts as one

erase cycle.

After the erase is complete, all bits in the page are set to

1. The CPU is halted if the CPU executes code

from the flash while the NVMC performs the partial erase operation.

The bits in the page are undefined if the flash page erase is incomplete, i.e. if a partial erase has started

but the total erase time is less than tERASEPAGE.

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