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NRF52820-QDAA-R7 Datasheet(PDF) 80 Page - Nordic Semiconductor |
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NRF52820-QDAA-R7 Datasheet(HTML) 80 Page - Nordic Semiconductor |
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80 / 437 page ![]() Power and clock management Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID B A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A R SRC Source of HFCLK RC 0 64 MHz internal oscillator (HFINT) Xtal 1 64 MHz crystal oscillator (HFXO) B R STATE HFCLK state NotRunning 0 HFCLK not running Running 1 HFCLK running 5.4.3.18 LFCLKRUN Address offset: 0x414 Status indicating that LFCLKSTART task has been triggered Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A R STATUS LFCLKSTART task triggered or not NotTriggered 0 Task not triggered Triggered 1 Task triggered 5.4.3.19 LFCLKSTAT Address offset: 0x418 LFCLK status Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID B A A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A R SRC Source of LFCLK RC 0 32.768 kHz RC oscillator (LFRC) Xtal 1 32.768 kHz crystal oscillator (LFXO) Synth 2 32.768 kHz synthesized from HFCLK (LFSYNT) B R STATE LFCLK state NotRunning 0 LFCLK not running Running 1 LFCLK running 5.4.3.20 LFCLKSRCCOPY Address offset: 0x41C Copy of LFCLKSRC register, set when LFCLKSTART task was triggered 4463_156 v1.0 80 |
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