NRF52811-QCAA-R7 datasheet(411/444 Pages) NORDIC

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Peripherals

The watchdog’s timeout period is given by:

timeout [s] = ( CRV + 1 ) / 32768

When started, the watchdog will automatically force the 32.768 kHz RC oscillator on as long as no other

32.768 kHz clock source is running and generating the 32.768 kHz system clock, see chapter CLOCK —

Clock control on page 61.

6.29.1 Reload criteria

The watchdog has eight separate reload request registers, which shall be used to request the watchdog to

reload its counter with the value specified in the CRV register. To reload the watchdog counter, the special

value 0x6E524635 needs to be written to all enabled reload registers.

One or more RR registers can be individually enabled through the RREN register.

6.29.2 Temporarily pausing the watchdog

By default, the watchdog will be active counting down the down-counter while the CPU is sleeping and

when it is halted by the debugger. It is however possible to configure the watchdog to automatically pause

while the CPU is sleeping as well as when it is halted by the debugger.

6.29.3 Watchdog reset

A TIMEOUT event will automatically lead to a watchdog reset.

See Reset on page 52 for more information about reset sources. If the watchdog is configured to generate

an interrupt on the TIMEOUT event, the watchdog reset will be postponed with two 32.768 kHz clock

cycles after the TIMEOUT event has been generated. Once the TIMEOUT event has been generated, the

impending watchdog reset will always be effectuated.

The watchdog must be configured before it is started. After it is started, the watchdog’s configuration

registers, which comprise registers CRV, RREN, and CONFIG, will be blocked for further configuration.

The watchdog can be reset from several reset sources, see Reset behavior on page 53.

When the device starts running again, after a reset, or waking up from OFF mode, the watchdog

configuration registers will be available for configuration again.

6.29.4 Registers

Base address

Peripheral

Instance

Description

Configuration

0x40010000

WDT

Watchdog timer

Table 118: Instances

Offset

Description

TASKS_START

0x000

Start the watchdog

EVENTS_TIMEOUT

0x100

Watchdog timeout

INTENSET

0x304

Enable interrupt

INTENCLR

0x308

Disable interrupt

RUNSTATUS

0x400

Run status

REQSTATUS

0x404

Request status

CRV

0x504

Counter reload value

RREN

0x508

Enable register for reload request registers

4454_140 v1.0

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