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R5F72115D160FPV Datasheet(PDF) 593 Page - Renesas Technology Corp

Part # R5F72115D160FPV
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family
PDF  1228 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F72115D160FPV Datasheet(HTML) 593 Page - Renesas Technology Corp

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Section 10 Multi-Function Timer Pulse Unit 2 (MTU2)
Rev. 2.00 May. 08, 2008 Page 569 of 1200
REJ09B0344-0200
(1)
Operation when Error Occurs during Normal Mode Operation, and Operation is
Restarted in Normal Mode
Figure 10.135 shows an explanatory diagram of the case where an error occurs in normal mode
and operation is restarted in normal mode after re-setting.
1
RESET
2
TMDR
(normal)
3
TOER
(1)
5
PFC
(MTU2)
4
TIOR
(1 init
0 out)
6
TSTR
(1)
7
Match
8
Error
occurs
9
PFC
(PORT)
10
TSTR
(0)
11
TMDR
(normal)
12
TIOR
(1 init
0 out)
13
PFC
(MTU2)
14
TSTR
(1)
MTU2 module output
TIOC*A
TIOC*B
Port output
PEn
PEn
n = 0 to 15
High-Z
High-Z
Figure 10.135 Error Occurrence in Normal Mode, Recovery in Normal Mode
1.
After a reset, MTU2 output is low and ports are in the high-impedance state.
2.
After a reset, the TMDR setting is for normal mode.
3.
For channels 3 and 4, enable output with TOER before initializing the pins with TIOR.
4.
Initialize the pins with TIOR. (The example shows initial high output, with low output on
compare-match occurrence.)
5.
Set MTU2 output with the PFC.
6.
The count operation is started by TSTR.
7.
Output goes low on compare-match occurrence.
8.
An error occurs.
9.
Set port output with the PFC and output the inverse of the active level.
10. The count operation is stopped by TSTR.
11. Not necessary when restarting in normal mode.
12. Initialize the pins with TIOR.
13. Set MTU2 output with the PFC.
14. Operation is restarted by TSTR.



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