R5F72115D160FPV datasheet(667/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 13 Compare Match Timer (CMT)

Rev. 2.00 May. 08, 2008 Page 643 of 1200

REJ09B0344-0200

13.3

Operation

13.3.1

Interval Count Operation

When an internal clock is selected with the CKS[1:0] bits in CMCSR and the STR bit in CMSTR

is set to 1, CMCNT starts incrementing using the selected clock. When the values in CMCNT and

CMCOR match, CMCNT is cleared to H'0000 and the CMF flag in CMCSR is set to 1. When the

CMIE bit in CMCSR is set to 1 at this time, a compare match interrupt (CMI) is requested.

CMCNT then starts counting up again from H'0000.

Figure 13.2 shows the operation of the compare match counter.

CMCOR

H'0000

CMCNT value

Time

Counter cleared by compare

match with CMCOR

Figure 13.2 Counter Operation

13.3.2

CMCNT Count Timing

One of four clocks (P

φ/8, Pφ/32, Pφ/128, and Pφ/512) obtained by dividing the peripheral clock

φ) can be selected with the CKS[1:0] bits in CMCSR. Figure 13.3 shows the timing.

CMCNT

NN + 1

Peripheral clock

φ)

Clock

N + 1

Internal clock

Count clock

Figure 13.3 Count Timing

R5F72115D160FPV Datasheet(PDF) 667 Page - Renesas Technology Corp