R5F72115D160FPV datasheet(663/1228 Pages) RENESAS

Part #	R5F72115D160FPV

Description	32-Bit RISC Microcomputer SuperHTM RISC engine Family

PDF	1228 Pages

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Manufacturer	RENESAS [Renesas Technology Corp]

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Section 13 Compare Match Timer (CMT)

Rev. 2.00 May. 08, 2008 Page 639 of 1200

REJ09B0344-0200

13.2.1

Compare Match Timer Start Register (CMSTR)

CMSTR is a 16-bit register that selects whether compare match counter (CMCNT) operates or is

stopped.

CMSTR is initialized to H'0000 by a power-on reset or in software standby mode, but retains its

previous value in module standby mode.

Bit:

Initial value:

R/W:

0000000000000000

RRRRRRRRRRRRRR

R/W

----

---

------

STR1

STR0

Bit

Bit Name

Initial

Value

R/W

Description

15 to 2

⎯

All 0

Reserved

These bits are always read as 0. The write value should

always be 0.

STR1

R/W

Count Start 1

Specifies whether compare match counter_1 operates

or is stopped.

0: CMCNT_1 count is stopped

1: CMCNT_1 count is started

STR0

R/W

Count Start 0

Specifies whether compare match counter_0 operates

or is stopped.

0: CMCNT_0 count is stopped

1: CMCNT_0 count is started

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