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R5F72115D160FPV Datasheet(PDF) 665 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 665 Page - Renesas Technology Corp |
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665 / 1228 page ![]() Section 13 Compare Match Timer (CMT) Rev. 2.00 May. 08, 2008 Page 641 of 1200 REJ09B0344-0200 Bit Bit Name Initial Value R/W Description 1, 0 CKS[1:0] 00 R/W Clock Select These bits select the clock to be input to CMCNT from four internal clocks obtained by dividing the peripheral clock (P φ). When the STR bit in CMSTR is set to 1, CMCNT starts counting on the clock selected with bits CKS[1:0]. 00: P φ/8 01: P φ/32 10: P φ/128 11: P φ/512 Note: * Only 0 can be written to clear the flag after 1 is read. |
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