R5F72115D160FPV datasheet(693/1228 Pages) RENESAS

693 / 1228 page

Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 May. 08, 2008 Page 669 of 1200

REJ09B0344-0200

Channel

Abbreviation

R/W

Initial Value Address

Access

Size

Serial mode register_2

SCSMR_2

R/W

H'0000

H'FFFE9000

Bit rate register_2

SCBRR_2

R/W

H'FF

H'FFFE9004

Serial control register_2

SCSCR_2

R/W

H'0000

H'FFFE9008

Transmit FIFO data register_2

SCFTDR_2

Undefined

H'FFFE900C

Serial status register_2

SCFSR_2

R/(W)*

H'0060

H'FFFE9010

Receive FIFO data register_2

SCFRDR_2

Undefined

H'FFFE9014

FIFO control register_2

SCFCR_2

R/W

H'0000

H'FFFE9018

FIFO data count register_2

SCFDR_2

H'0000

H'FFFE901C

Serial port register_2

SCSPTR_2

R/W

H'0050

H'FFFE9020

Line status register_2

SCLSR_2

R/(W)*

H'0000

H'FFFE9024

Serial extended mode

register_2

SCSEMR_2

R/W

H'00

H'FFFE9100

Serial mode register_3

SCSMR_3

R/W

H'0000

H'FFFE9800

Bit rate register_3

SCBRR_3

R/W

H'FF

H'FFFE9804

Serial control register_3

SCSCR_3

R/W

H'0000

H'FFFE9808

Transmit FIFO data register_3

SCFTDR_3

Undefined

H'FFFE980C

Serial status register_3

SCFSR_3

R/(W)*

H'0060

H'FFFE9810

Receive FIFO data register_3

SCFRDR_3

Undefined

H'FFFE9814

FIFO control register_3

SCFCR_3

R/W

H'0000

H'FFFE9818

FIFO data count register_3

SCFDR_3

H'0000

H'FFFE981C

Serial port register_3

SCSPTR_3

R/W

H'0050

H'FFFE9820

Line status register_3

SCLSR_3

R/(W)*

H'0000

H'FFFE9824

Notes: 1. Only 0 can be written to clear the flag. Bits 15 to 8, 3, and 2 are read-only bits that

cannot be modified.

2. Only 0 can be written to clear the flag. Bits 15 to 1 are read-only bits that cannot be

modified.

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