R5F72115D160FPV datasheet(919/1228 Pages) RENESAS

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Section 21 Flash Memory

Rev. 2.00 May. 08, 2008 Page 895 of 1200

REJ09B0344-0200

21.3

Input/Output Pins

Flash memory is controlled by the pins as shown in table 21.3.

Table 21.3

Pin Configuration

Pin Name

Symbol

Input/Output

Function

Power-on reset

RES

Input

Reset

Flash programming

enable

FWE

Input

Hardware protection when

programming flash memory

Mode 1

MD1

Input

Sets operating mode of this LSI

Mode 0

MD0

Input

Sets operating mode of this LSI

Transmit data

TXD1 (PA25)

Output

Serial transmit data output (used in

boot mode)

Receive data

RXD1 (PA24)

Input

Serial receive data input (used in boot

mode)

21.4

21.4.1

Registers

The registers/parameters which control flash memory when the on-chip flash memory is valid are

shown in table 21.4.

There are several operating modes for accessing flash memory, for example, read mode/program

mode.

There are two memory MATs: user MAT and user boot MAT. The dedicated registers/parameters

are allocated for each operating mode and MAT selection. The correspondence of operating modes

and registers/parameters for use is shown in table 21.5.

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