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R5F72115D160FPV Datasheet(PDF) 948 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 948 Page - Renesas Technology Corp |
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948 / 1228 page ![]() Section 21 Flash Memory Rev. 2.00 May. 08, 2008 Page 924 of 1200 REJ09B0344-0200 21.5.2 User Program Mode The user MAT can be programmed/erased in user program mode. (The user boot MAT cannot be programmed/erased.) Programming/erasing is executed by downloading the program in the microcontroller. The overview flow is shown in figure 21.9. High voltage is applied to internal flash memory during the programming/erasing processing. Therefore, transition to reset must not be executed. Doing so may cause damage or destroy flash memory. If reset is executed accidentally, the reset signal must be released after the reset input period, which is longer than the normal 100 μs. For details on the programming procedure, see the description in section 21.5.2 (2), Programming Procedure in User Program Mode. For details on the erasing procedure, see the description in section 21.5.2 (3), Erasing Procedure in User Program Mode. For the overview of a processing that repeats erasing and programming by downloading the programming program and the erasing program in separate on-chip ROM areas using FTDAR, see the description in section 21.5.2 (4), Erasing and Programming Procedure in User Program Mode. When programming, program data is prepared FWE=1 ? Programming/erasing procedure program is transferred to the on-chip RAM and executed Yes No Programming/erasing start Programming/erasing end 1. Inputting high level to the FWE pin sets the FWE bit to 1. 2. Programming/erasing is executed only in the on-chip RAM. However, if the program data is in a consecutive area and can be accessed by the MOV.B instruction of the CPU like SRAM/ROM, the program data can be in an external space. 3. After programming/erasing is finished, low level must be input to the FWE pin for protection. Figure 21.9 Programming/Erasing Overview Flow |
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