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R5F72115D160FPV Datasheet(PDF) 949 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 949 Page - Renesas Technology Corp |
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949 / 1228 page ![]() Section 21 Flash Memory Rev. 2.00 May. 08, 2008 Page 925 of 1200 REJ09B0344-0200 (1) On-Chip RAM Address Map when Programming/Erasing is Executed Parts of the procedure program that are made by the user, like download request, programming/erasing procedure, and decision of the result, must be executed in the on-chip RAM. All of the on-chip program that is to be downloaded is in on-chip RAM. Note that on-chip RAM must be controlled so that these parts do not overlap. Figure 21.10 shows the program area to be downloaded. System use area (15 bytes) RAMTOP (H'FFFF8000) FTDAR setting Programming/ erasing entry DPFR (Return value: 1 byte) Area that can be used by user FTDAR setting+16 <On-chip RAM> Address Initialization process entry FTDAR setting+32 FTDAR setting+3072 Initialization + programming program or Initialization + erasing program Area that can be used by user RAMEND (H'FFF87FFF) Area to be downloaded (Size: 3 kbytes) Unusable area in programming/erasing processing period Figure 21.10 RAM Map after Download |
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