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R5F72115D160FPV Datasheet(PDF) 1022 Page - Renesas Technology Corp |
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R5F72115D160FPV Datasheet(HTML) 1022 Page - Renesas Technology Corp |
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1022 / 1228 page ![]() Section 23 Power-Down Modes Rev. 2.00 May. 08, 2008 Page 998 of 1200 REJ09B0344-0200 Bit Bit Name Initial Value R/W Description 4 MSTP34 1 R/W Module Stop 34 When the MSTP34 bit is set to 1, the supply of the clock to the POE2 is halted. 0: POE2 runs. 1: Clock supply to POE2 halted. 3 MSTP33 1 R/W Module Stop 33 When the MSTP33 bit is set to 1, the supply of the clock to the IIC3 is halted. 0: IIC3 runs. 1: Clock supply to IIC3 halted. 2 MSTP32 1 R/W Module Stop 32 When the MSTP32 bit is set to 1, the supply of the clock to the ADC is halted. 0: ADC runs. 1: Clock supply to ADC halted. 1 MSTP31 1 R/W Module Stop 31 When the MSTP31 bit is set to 1, the supply of the clock to the DAC is halted. 0: DAC runs. 1: Clock supply to DAC halted. 0 MSTP30 0 R/W Module Stop 30 When the MSTP30 bit is set to 1, the supply of the clock to the flash memory is halted. 0: Flash memory runs. 1: Clock supply to flash memory halted. |
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