R5F72115D160FPV datasheet(1023/1228 Pages) RENESAS

1023 / 1228 page

Section 23 Power-Down Modes

Rev. 2.00 May. 08, 2008 Page 999 of 1200

REJ09B0344-0200

23.3.4

Standby Control Register 4 (STBCR4)

STBCR4 is an 8-bit readable/writable register that controls the operation of modules in power-

down modes. STBCR4 is initialized to H'F4 by a power-on reset but retains its previous value by a

manual reset or in software standby mode. Only byte access is possible.

7654321

1111

R/W

Bit:

Initial value:

R/W:

MSTP

Bit

Bit Name

Initial

Value

R/W

Description

MSTP47

R/W

Module Stop 47

When the MSTP47 bit is set to 1, the supply of the

clock to the SCIF0 is halted.

0: SCIF0 runs.

1: Clock supply to SCIF0 halted.

MSTP46

R/W

Module Stop 46

When the MSTP46 bit is set to 1, the supply of the

clock to the SCIF1 is halted.

0: SCIF1 runs.

1: Clock supply to SCIF1 halted.

MSTP45

R/W

Module Stop 45

When the MSTP45 bit is set to 1, the supply of the

clock to the SCIF2 is halted.

0: SCIF2 runs.

1: Clock supply to SCIF2 halted.

MSTP44

R/W

Module Stop 44

When the MSTP44 bit is set to 1, the supply of the

clock to the SCIF3 is halted.

0: SCIF3 runs.

1: Clock supply to SCIF3 halted.

⎯

Reserved

This bit is always read as 0. The write value should

always be 0.

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