R5F72115D160FPV datasheet(1021/1228 Pages) RENESAS

1021 / 1228 page

Section 23 Power-Down Modes

Rev. 2.00 May. 08, 2008 Page 997 of 1200

REJ09B0344-0200

23.3.3

Standby Control Register 3 (STBCR3)

STBCR3 is an 8-bit readable/writable register that controls the operation of modules in power-

down modes. STBCR3 is initialized to H'7E by a power-on reset but retains its previous value by a

manual reset or in software standby mode. Only byte access is possible.

7654321

01111110

R/W

Bit:

Initial value:

R/W:

MSTP

HIZ

MSTP

Bit

Bit Name

Initial

Value

R/W

Description

HIZ

R/W

Port High Impedance

Selects whether the state of a specified pin is

retained or the pin is placed in the high-impedance

state in software standby mode. See appendix A, Pin

States to determine the pin to which this control is

applied.

Do not set this bit when the TME bit of WTSCR of the

WDT is 1. When setting the output pin to the high-

impedance state, set the HIZ bit with the TME bit

being 0.

0: The pin state is held in software standby mode.

1: The pin state is set to the high-impedance state in

software standby mode.

MSTP36

R/W

Module Stop 36

When the MSTP36 bit is set to 1, the supply of the

clock to the MTU2S is halted.

0: MTU2S runs.

1: Clock supply to MTU2S halted.

MSTP35

R/W

Module Stop 35

When the MSTP35 bit is set to 1, the supply of the

clock to the MTU2 is halted.

0: MTU2 runs.

1: Clock supply to MTU2 halted.

R5F72115D160FPV Datasheet(PDF) 1021 Page - Renesas Technology Corp

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