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HD6432351 Datasheet(PDF) 710 Page - Renesas Technology Corp |
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HD6432351 Datasheet(HTML) 710 Page - Renesas Technology Corp |
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710 / 1025 page ![]() Section 18 ROM (H8S/2351 Only) Rev. 3.00 Sep 15, 2006 page 676 of 988 REJ09B0330-0300 18.2 Operation The on-chip ROM is connected to the CPU by a 16-bit data bus, and both byte and word data can be accessed in one state. Even addresses are connected to the upper 8 bits, and odd addresses to the lower 8 bits. Word data must start at an even address. The on-chip ROM is enabled and disabled by setting the mode pins (MD2, MD1, and MD0). These settings are shown in table 18.1. In normal mode, a maximum of 56 kbytes of ROM can be used. Table 18.1 Operating Modes and ROM Area Mode Pin Operating Mode MD2 MD1 MD0 On-Chip ROM Mode 1 Normal expanded mode with on-chip ROM disabled 0 0 1 Disabled Mode 2 Normal expanded mode with on-chip ROM enabled 1 0 Enabled (56 kbytes) Mode 3 Normal single-chip mode 1 Mode 4 Advanced expanded mode with on-chip ROM disabled 1 0 0 Disabled Mode 5 Advanced expanded mode with on-chip ROM disabled 1 Mode 6 Advanced expanded mode with on-chip ROM enabled 1 0 Enabled Mode 7 Advanced single-chip mode 1 |
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