H8SLASH3021 datasheet(339/712 Pages) RENESAS

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10. Watchdog Timer

Rev.2.00 Mar. 22, 2007 Page 315 of 684

REJ09B0352-0200

Section 10 Watchdog Timer

10.1

Overview

The H8/3022 Group has an on-chip watchdog timer (WDT). The WDT has two selectable

functions: it can operate as a watchdog timer to supervise system operation, or it can operate as an

interval timer. As a watchdog timer, it generates a reset signal for the H8/3022 Group chip if a

system crash allows the timer counter (TCNT) to overflow before being rewritten. In interval

timer operation, an interval timer interrupt is requested at each TCNT overflow.

10.1.1

Features

WDT features are listed below.

• Selection of eight counter clock sources

φ/2, φ/32, φ/64, φ/128, φ/256, φ/512, φ/2048, or φ/4096

• Interval timer option

• Timer counter overflow generates a reset signal or interrupt.

The reset signal is generated in watchdog timer operation. An interval timer interrupt is

generated in interval timer operation.

• Watchdog timer reset signal resets the entire H8/3022 Group chip internally, and can also be

output externally.*

The reset signal generated by timer counter overflow during watchdog timer operation resets the

entire H8/3022 Group internally. An external reset signal can be output from the

RESO pin to

reset other system devices simultaneously.

Note: * The

RESO pin of the mask ROM version is the dedicated FWE input pin of the F-

ZTAT version. Therefore, the F-ZTAT version cannot output the reset signal to the

outside.

H8/3021 Datasheet(PDF) 339 Page - Renesas Technology Corp