H8SLASH3021 datasheet(432/712 Pages) RENESAS

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12. Smart Card Interface

Rev.2.00 Mar. 22, 2007 Page 408 of 684

REJ09B0352-0200

12.3.5

Clock

Only an internal clock generated by the on-chip baud rate generator can be used as the

transmit/receive clock for the smart card interface. The bit rate is set with BRR and the CKS1 and

CKS0 bits in SMR. The formula for calculating the bit rate is as shown below. Table 12.5 shows

some sample bit rates.

If clock output is selected by setting CKE0 to 1, a clock with a frequency of 372 times the bit rate

is output from the SCK

0 pin.

B =

1488

× 22n–1 × (N + 1)

× 106

Where: N = Value set in BRR (0

≤ N ≤ 255)

B = Bit rate (bit/s)

φ = Operating frequency* (MHz)

n = See table 12.4

Table 12.4

Correspondence between n and CKS1, CKS0

CKS1

CKS0

Note:

If the gear function is used to divide the system clock frequency,use the divided frequency

to calculate the bit rate. The equation above applies directly to 1/1 frequency division.

Table 12.5

Examples of Bit Rate B (bit/s) for Various BRR Settings (When n = 0)

φ (MHz)

7.1424

10.00

10.7136

13.00

14.2848

16.00

18.00

9600.0

13440.9

14400.0

17473.1

19200.0

21505.4

24193.5

4800.0

6720.4

7200.0

8736.6

9600.0

10752.7

12096.8

3200.0

4480.3

4800.0

5824.4

6400.0

7168.5

8064.5

Note:

Bit rates are rounded off to one decimal place.

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