H8SLASH3021 datasheet(556/712 Pages) RENESAS

556 / 712 page

18. Electrical Characteristics

Rev.2.00 Mar. 22, 2007 Page 532 of 684

REJ09B0352-0200

Table 18.5

Control Signal Timing

Conditions: V

CC = 3.0 V to 3.6 V, AVCC = 3.6 V to 5.5 V, VSS = AVSS = 0 V,

φ = 2 MHz to 18 MHz, T

a = –20°C to +75°C

Item

Symbol

Min

Max

Unit

Test Conditions

RES setup time

RESS

200

—

Figure 18.10

RES pulse width

RESW

10*

—

cyc

Mode programming setup

time (MD

0, MD1, MD2)

MDS

200

—

RESO output delay time

RESD

—

100

Figure 18.11

RESO output pulse width t

RESOW

132

—

tcyc

NMI setup time

(NMI,

IRQ

0, IRQ1,

IRQ

4, IRQ5)

NMIS

150

—

Figure 18.12

NMI hold time

(NMI,

IRQ

0, IRQ1,

IRQ

4, IRQ5)

NMIH

—

Interrupt pulse width

(NMI,

IRQ

1, IRQ0 when

exiting software standby

mode)

NMIW

200

—

Clock oscillator settling

time at reset (crystal)

OSC1

—

Figure 18.13

Clock oscillator settling

time in software standby

(crystal)

OSC2

—

Figure 17.1

Note:

∗ The reset time during operation is a minimum of 10 system clock cycles in the H8/3022,

H8/3021, and H8/3020 mask ROM versions, but the H8/3022 flash memory version

requires a minimum of 20 system clock cycles.

H8/3021 Datasheet(PDF) 556 Page - Renesas Technology Corp

H8/3021 Datasheet(HTML) 556 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL