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H8/3021 Datasheet(PDF) 629 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 629 Page - Renesas Technology Corp |
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629 / 712 page  Appendix B. Internal I/O Register Field Rev.2.00 Mar. 22, 2007 Page 605 of 684 REJ09B0352-0200 TFCR—Timer Function Control Register H'63 ITU (all channels) Bit Initial value Read/Write 7 — 1 — 6 — 1 — 5 CMD1 0 R/W 4 CMD0 0 R/W 3 BFB4 0 R/W 0 BFA3 0 R/W 2 BFA4 0 R/W 1 BFB3 0 R/W Buffer mode A3 0 GRA3 operates normally 1 GRA3 is buffered by BRA3 Buffer mode B4 0 GRB4 operates normally 1 GRB4 is buffered by BRB4 Buffer mode B3 0 GRB3 operates normally 1 GRB3 is buffered by BRB3 Buffer mode A4 0 GRA4 operates normally 1 GRA4 is buffered by BRA4 Combination mode 1 and 0 Channels 3 and 4 operate normally Channels 3 and 4 operate together in complementary PWM mode Channels 3 and 4 operate together in reset-synchronized PWM mode Bit 5 0 1 Bit 4 0 1 0 1 Operating Mode of Channels 3 and 4 CMD1 CMD0 |
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