H8SLASH3021 datasheet(129/712 Pages) RENESAS

129 / 712 page

5. Interrupt Controller

Rev.2.00 Mar. 22, 2007 Page 105 of 684

REJ09B0352-0200

Generation conditions

(1) A read of the ISR register is executed to clear the IRQaF flag while it is set to 1, then the

IRQbF flag is cleared by the execution of interrupt exception handling.

(2) When the IRQaF flag is cleared, there is contention with IRQb generation (IRQaF flag setting).

(IRQbF was 0 when ISR was read to clear the IRQaF flag, but IRQbF is set to 1 before ISR is

written to.)

If the above setting conditions (1) to (3) and generation conditions (1) and (2) are all fulfilled,

when the ISR write in generation condition (2) is performed the IRQbF flag will be cleared

inadvertently, and interrupt exception handling will not be executed.

However, this inadvertent clearing of the IRQbF flag will not occur if 0 is written to this flag even

once between generation conditions (1) and (2).

1 read 0 written

1 read

written

1 read 0 written

0 read

written

IRQb

executed

Generation condition (1)

Generation condition (2)

(Inadvertent clearing)

IRQaF

IRQbF

Figure 5.9 IRQnF Flag when Interrupt Exception Handling is not Executed

Either of the methods shown following should be used to prevent this problem.

H8/3021 Datasheet(PDF) 129 Page - Renesas Technology Corp