H8SLASH3021 datasheet(159/712 Pages) RENESAS

159 / 712 page

7. I/O Ports

Rev.2.00 Mar. 22, 2007 Page 135 of 684

REJ09B0352-0200

When a bit in P1DDR is set to 1, if port 1 is read the value of the corresponding P1DR bit is

returned directly, regardless of the actual state of the pin. When a bit in P1DDR is cleared to 0, if

port 1 is read the corresponding pin level is read.

P1DR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it

retains its previous setting.

7.2.3

Pin Functions in Each Mode

The pin functions of port 1 differ between mode 1, 3 (expanded mode with on-chip ROM

disabled) , modes 5 and 6 (expanded mode with on-chip ROM enabled), and mode 7 (single-chip

mode). The pin functions in each mode are described as follows.

Modes 1 and 3: Address output can be selected for each pin in port 1. Figure 7.2 shows the pin

functions in modes 1 and 3.

Port 1

A (output)

Figure 7.2 Pin Functions in Modes 1 and 3 (Port 1)

Modes 5 and 6: Address output or generic input can be selected for each pin in port 1. A pin

becomes an address output pin if the corresponding P1DDR bit is set to 1, and a generic input pin

if this bit is cleared to 0. Following a reset, all pins are input pins. To use a pin for address output,

its P1DDR bit must be set to 1. Figure 7.3 shows the pin functions in modes 5 and 6.

H8/3021 Datasheet(PDF) 159 Page - Renesas Technology Corp