H8SLASH3021 datasheet(271/712 Pages) RENESAS

271 / 712 page

8. 16-Bit Integrated Timer Unit (ITU)

Rev.2.00 Mar. 22, 2007 Page 247 of 684

REJ09B0352-0200

Setup Procedure for Complementary PWM Mode: Figure 8.33 shows a sample procedure for

setting up complementary PWM mode.

Complementary PWM mode

1. Clear bits STR3 and STR4 to 0 in

TSTR to halt the timer counters.

Complementary PWM mode must be

set up while TCNT3 and TCNT4 are

halted.

Complementary PWM mode

Stop counting

Select counter clock

Select complementary

PWM mode

Set TCNTs

Set general registers

Start counters

2. Set bits TPSC2 to TPSC0 in TCR to

select the same counter clock source

for channels 3 and 4. If an external

clock source is selected, select the

external clock edge(s) with bits

CKEG1 and CKEG0 in TCR. Do not

select any counter clear source

with bits CCLR1 and CCLR0 in TCR.

3. Set bits CMD1 and CMD0 in TFCR

to select complementary PWM mode.

TIOCA3, TIOCB3, TIOCA4, TIOCB4,

TOCXA4, and TOCXB4 automatically

become PWM output pins.

4. Clear TCNT4 to H'0000. Set the

non-overlap margin in TCNT3. Do not

set TCNT3 and TCNT4 to the same

value.

5. GRA3 is the waveform period

TCNT3 minus 1 in GRA3. Set

transition times of the PWM output

waveforms in GRB3, GRA4, and

GRB4. Set times within the compare

match range of TCNT3 and TCNT4.

X (X: initial setting of GRB3,

GRA4, or GRB4. T: initial setting of

TCNT3)

≤

6. Set bits STR3 and STR4 in TSTR to

1 to start TCNT3 and TCNT4.

Note: After exiting complementary PWM mode, to resume operating in complementary

PWM mode, follow the entire setup procedure from step 1 again.

Figure 8.33 Setup Procedure for Complementary PWM Mode (Example)

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