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H8/3021 Datasheet(PDF) 272 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 272 Page - Renesas Technology Corp |
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272 / 712 page ![]() 8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 248 of 684 REJ09B0352-0200 Clearing Complementary PWM Mode: Figure 8.34 shows a sample procedure for clearing complementary PWM mode. Complementary PWM mode Normal operation Clear complementary mode 1 Stop counting 2 1. 2. Clear bit CMD1 in TFCR to 0, and set channels 3 and 4 to normal operating mode. After setting channels 3 and 4 to normal operating mode, wait at least one clock count before clearing bits STR3 and STR4 of TSTR to 0 to stop the counter operation of TCNT3 and TCNT4. Figure 8.34 Clearing Procedure for Complementary PWM Mode (Example) |
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