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H8/3028F Datasheet(PDF) 339 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 339 Page - Renesas Technology Corp |
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339 / 923 page ![]() Rev. 2.00, 09/03, page 309 of 890 Section 9 16-Bit Timer 9.1 Overview The H8/3028 Group has built-in 16-bit timer module with three 16-bit counter channels. 9.1.1 Features 16-bit timer features are listed below. • Capability to process up to 6 pulse outputs or 6 pulse inputs • Six general registers (GRs, two per channel) with independently-assignable output compare or input capture functions • Selection of eight counter clock sources for each channel: Internal clocks: φ, φ/2, φ/4, φ/8 External clocks: TCLKA, TCLKB, TCLKC, TCLKD • Five operating modes selectable in all channels: Waveform output by compare match Selection of 0 output, 1 output, or toggle output (only 0 or 1 output in channel 2) Input capture function Rising edge, falling edge, or both edges (selectable) Counter clearing function Counters can be cleared by compare match or input capture Synchronization Two or more timer counters (16TCNTs) can be preset simultaneously, or cleared simultaneously by compare match or input capture. Counter synchronization enables synchronous register input and output. PWM mode PWM output can be provided with an arbitrary duty cycle. With synchronization, up to three-phase PWM output is possible • Phase counting mode selectable in channel 2 Two-phase encoder output can be counted automatically. • High-speed access via internal 16-bit bus The 16TCNTs and GRs can be accessed at high speed via a 16-bit bus. • Any initial timer output value can be set • Nine interrupt sources Each channel has two compare match/input capture interrupts and an overflow interrupt. All interrupts can be requested independently. |
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