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H8/3028F Datasheet(PDF) 399 Page - Renesas Technology Corp |
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H8/3028F Datasheet(HTML) 399 Page - Renesas Technology Corp |
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399 / 923 page  Rev. 2.00, 09/03, page 369 of 890 Note on Waveform Period Setting: When a counter is cleared by compare match, the counter is cleared in the last state at which the 16TCNT value matches the general register value, at the time when this value would normally be updated to the next count. The actual counter frequency is therefore given by the following formula: f = φ (N + 1) (f: counter frequency. φ: system clock frequency. N: value set in general register.) Note on Writes in Synchronized Operation: When channels are synchronized, if a 16TCNT value is modified by byte write access, all 16 bits of all synchronized counters assume the same value as the counter that was addressed. (Example) When channels 1 and 2 are synchronized • Byte write to channel 1 or byte write to channel 2 16TCNT1 16TCNT2 W Y X Z 16TCNT1 16TCNT2 A A X X 16TCNT1 16TCNT2 Y Y A A 16TCNT1 16TCNT2 W Y X Z 16TCNT1 16TCNT2 A A B B • Word write to channel 1 or word write to channel 2 Upper byte Lower byte Upper byte Lower byte Upper byte Lower byte Upper byte Lower byte Upper byte Lower byte Write A to upper byte of channel 1 Write A to lower byte of channel 2 Write AB word to channel 1 or 2 |
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