H8SLASH3028F datasheet(423/923 Pages) RENESAS

Part #	H8/3028F

Description	Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series

PDF	923 Pages

Scroll/Zoom	100%

Manufacturer	RENESAS [Renesas Technology Corp]

Direct Link	http://www.renesas.com

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423 / 923 page

Rev. 2.00, 09/03, page 393 of 890

Clear by Compare Match: Depending on the setting of the CCLR1 and CCLR0 bits in 8TCR,

8TCNT can be cleared when compare match A or B occurs, Figure 10.11 shows the timing of

this operation.

H'00

8TCNT

Compare match signal

Figure 10.11 Timing of Clear by Compare Match

Clear by Input Capture: Depending on the setting of the CCLR1 and CCLR0 bits in 8TCR,

8TCNT can be cleared when input capture B occurs. Figure 10.12 shows the timing of this

operation.

Input capture signal

Input capture input

8TCNT

NH '00

Figure 10.12 Timing of Clear by Input Capture

10.4.3

Input Capture Signal Timing

Input capture on the rising edge, falling edge, or both edges can be selected by settings in 8TCSR.

Figure 10.13 shows the timing when the rising edge is selected.

The pulse width of the input capture input signal must be at least 1.5 system clocks when a single

edge is selected, and at least 2.5 system clocks when both edges are selected.

H8/3028F Datasheet(PDF) 423 Page - Renesas Technology Corp