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H8/3028F Datasheet(PDF) 457 Page - Renesas Technology Corp

Part # H8/3028F
Description  Renesas 16-Bit Single-Chip Microcomputer H8 Family/H8/300H Series
PDF  923 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8/3028F Datasheet(HTML) 457 Page - Renesas Technology Corp

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Rev. 2.00, 09/03, page 427 of 890
11.3
Operation
11.3.1
Overview
When corresponding bits in PADDR or PBDDR and NDERA or NDERB are set to 1, TPC output
is enabled. The TPC output initially consists of the corresponding PADR or PBDR contents.
When a compare-match event selected in TPCR occurs, the corresponding NDRA or NDRB bit
contents are transferred to PADR or PBDR to update the output values.
Figure 11.2 illustrates the TPC output operation. Table 11.3 summarizes the TPC operating
conditions.
DDR
NDER
QQ
TPC output pin
DR
NDR
C
QD
QD
Internal
data bus
Output trigger signal
Figure 11.2 TPC Output Operation
Table 11.3 TPC Operating Conditions
NDER
DDR
Pin Function
0
0
Generic input port
1
Generic output port
1
0
Generic input port (but the DR bit is a read-only bit, and when compare
match occurs, the NDR bit value is transferred to the DR bit)
1
TPC pulse output
Sequential output of up to 16-bit patterns is possible by writing new output data to NDRA and
NDRB before the next compare match. For information on non-overlapping operation, see
section 11.3.4, Non-Overlapping TPC Output.



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