H8SLASH3028F datasheet(461/923 Pages) RENESAS

461 / 923 page

Rev. 2.00, 09/03, page 431 of 890

11.3.4

Non-Overlapping TPC Output

Sample Setup Procedure for Non-Overlapping TPC Output: Figure 11.6 shows a sample

procedure for setting up non-overlapping TPC output.

Non-overlapping

TPC output

Set next TPC output data

Compare match A?

Yes

Set next TPC output data

Start counter

16-bit timer

setup

16-bit timer

setup

Port and

TPC setup

Set initial output data

Set up TPC output

Enable TPC transfer

Select TPC transfer trigger

Select non-overlapping groups

10.

11.

12.

Set TIOR to make GRA and GRB output

compare registers (with output inhibited).

Set the TPC output trigger period in GRB

and the non-overlap margin in GRA.

Select the counter clock source with bits

TPSC2 to TPSC0 in TCR. Select the counter

clear source with bits CCLR1 and CCLR0.

Enable the IMFA interrupt in TISRA.

The DMAC can also be set up to transfer

data to the next data register.

Set the initial output values in the DR bits

of the input/output port pins to be used for

TPC output.

Set the DDR bits of the input/output port pins

to be used for TPC output to 1.

Set the NDER bits of the pins to be used for

TPC output to 1.

In TPCR, select the 16-bit timer compare match

event to be used as the TPC output trigger.

In TPMR, select the groups that will operate

in non-overlap mode.

Set the next TPC output values in the NDR

bits.

Set the STR bit to 1 in TSTR to start the timer

counter.

At each IMFA interrupt, write the next output

value in the NDR bits.

Select GR functions

Set GR values

Select counting operation

Select interrupt requests

Figure 11.6 Setup Procedure for Non-Overlapping TPC Output (Example)

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