H8SLASH3028F datasheet(632/923 Pages) RENESAS

632 / 923 page

Rev. 2.00, 09/03, page 602 of 890

18.6.2

Program-Verify Mode

In program-verify mode, the data written in program mode is read to check whether it has been

correctly written in the flash memory.

After the elapse of the given programming time, clear the P bit in FLMCR1, then wait for at least

(tcp) µs before clearing the PSU bit to exit program mode. After exiting program mode, the

watchdog timer setting is also cleared. The operating mode is then switched to program-verify

mode by setting the PV bit in FLMCR1. Before reading in program-verify mode, a dummy write

of H'FF data should be made to the addresses to be read. The dummy write should be executed

after the elapse of (tspv) µs or more. When the flash memory is read in this state (verify data is read

in 16-bit units), the data at the latched address is read. Wait at least (tspvr) µs after the dummy write

before performing this read operation. Next, the originally written data is compared with the verify

data, and reprogram data is computed (see figure 18.10) and transferred to RAM. After

verification of 128 bytes of data has been completed, exit program-verify mode, wait for at least

(tcpv) µs, then clear the SWE bit in FLMCR1. If reprogramming is necessary, set program mode

again, and repeat the program/program-verify sequence as before. The maximum number of

repetitions of the program/program-verify sequence is indicated by the maximum programming

count (N). Leave a wait time of at least (tcswe) µs after clearing SWE.

Notes on Program/Program-Verify Procedure

1. The program/program-verify procedure for the H8/3028F-ZTAT uses a 128-byte-unit

programming algorithm.

In order to perform 128-byte-unit programming, the lower 8 bits of the write start address must

be H'00 or H'80.

2. When performing continuous writing of 128-byte data to flash memory, byte-unit transfer

should be used.

128-byte data transfer is necessary even when writing fewer than 128 bytes of data. Write

H'FF data to the extra addresses.

3. Verify data is read in word units.

4. The write pulse is applied and a flash memory write executed while the P bit in FLMCR1 is

set. In the H8/3028F-ZTAT, write pulses should be applied as follows in the

program/program-verify procedure to prevent voltage stress on the device and loss of write

data reliability.

a. After write pulse application, perform a verify-read in program-verify mode and apply a

write pulse again for any bits read as 1 (reprogramming processing). When all the 0-write

bits in the 128-byte write data are read as 0 in the verify-read operation, the

program/program-verify procedure is completed. In the H8/3028F-ZTAT, the number of

loops in reprogramming processing is guaranteed not to exceed the maximum value of the

maximum programming count (N).

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